1. Field of the Invention
The present invention relates to techniques for forming semiconductor devices having salicided metal contacts.
2. Description of the Related Art
As scaling continues to occur in the semiconductor industry, the corresponding reduction in junction depths makes it more difficult to reliably form salicided contacts. In conventional CMOS processing, self-aligned silicided (xe2x80x9csalicidedxe2x80x9d) metal contacts are initially formed on silicon substrates by depositing cobalt, titanium or other metals and then annealing. Silicides, such as tungsten silicide (WSi2), titanium silicide (TiSi2), and cobalt silicide (CoSi2) are used in the semiconductor industry to enhance signal propagation through MOS transistors and other conductive features of semiconductor devices. A conventional silicide process produces a silicide region on the top of an MOS transistor""s polysilicon (xe2x80x9cpolyxe2x80x9d) gate electrode and interconnect. The silicide has a lower resistance than the underlying doped silicon or poly. As a result, signal propagation through the transistor (gate and interconnect) is enhanced. The deposited metal layer is conventionally capped with a TiN or Ti protective layer to prevent oxidation of the metal.
The metal contacts are later salicided in the conventional process by subjecting the wafer to the high temperatures of an annealing process such as rapid thermal annealing. But the process typically consumes significant portions of the silicon substrate in order to form the silicided metal. The depth of the silicon consumed in the salicidation process is determined by the salicidation mechanism between the metal and the silicon substrate. Some metal based silicides such as NiSi offer low silicon consumption but suffer from agglomeration and early nucleation to the highly resistive NiSi2 phase at temperatures as low as 650xc2x0 C.
Moreover, salicide spikes may shorten the junctions. The traditional metal film process involves depositing the metal using a traditional physical vapor deposition (PVD) process. The silicidation process enables nonuniformities in the surface of the substrate to form spikes as the silicide is grown in a thermal environment. With sufficient depth in the junction, these thermal spikes caused by the substrate surface nonuniformities do not significantly affect the junction operation. However, as the junction becomes ultra shallow to meet the scaling requirements of future miniaturized CMOS technologies, these thermal salicide spikes may shorten the junction and destroy the operation of the device.
Accordingly, it is desirable to reliably produce a thin silicided contact without forming large spikes in the substrate. It is desirable to avoid these spikes especially with shallow junctions to assure reliable operation of the junction.
To achieve the foregoing, the present invention provides a process for forming a semiconductor device having salicided contacts. A concentration of metal is formed in a surface region of a silicon substrate by exposing the substrate to a metal plasma. The concentration of metal is then annealed to produce a salicided contact. The incorporation of the metal ions into the substrate provides greater control over the thickness of the metal contact and provides a salicided contact with smaller nonuniformities than conventional salicide formation methods.
In one aspect, the invention provides a method of forming a semiconductor device having salicided contacts. A concentration of metal is formed at the silicon substrate surface of a partially formed semiconductor device by exposing the substrate to a metal plasma. Salicided contacts are formed by annealing the concentration of metal at the substrate surface. A barrier cap is formed on the formed concentration of metal. The annealing step occurs in a separate step after the substrate is exposed to the metal plasma.
In another aspect, a concentration of metal is formed at the silicon substrate surface of a partially formed semiconductor device by exposing the substrate to a metal plasma. Salicided contacts are formed by annealing the concentration of metal at the substrate surface. A barrier cap is formed on the formed concentration of metal by using plasma doping equipment.
In yet another aspect, annealing the concentration of metal at the silicon substrate surface is an in-situ step occurring simultaneously with exposing the substrate to a metal plasma. The substrate is heated to a preselected temperature simultaneously with the metallization plasma without the need for a separate annealing step.